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(trilema) asciilifeform: i, for instance, would like to know which fpga was their starting point. and where its factory test pads are.
(trilema) asciilifeform: |\n: best suspicion thus far is that it is a 'hardcopy fpga' (cheap, relatively, method for getting chip baked, they apply a custom metallization mask to a stock crystal)
(trilema) asciilifeform: all i've been able to find is that 1) it is an arm cortex-m , prolly licensed 2) started life as fpga ( see google's src, comments repeatedly refer to earlier vers as 'fpga' , then , later, 'g-chip' )
(trilema) asciilifeform: the fact that h1 started life as fpga, suggests this.
(trilema) asciilifeform: https://archive.li/ZtbxL << clue re origin of 'h1'. seems like they took a 'metallization mask' fpga, a la early asicminer crapola, and run licensed cortex-m3 core .
(trilema) asciilifeform: aaaand 1) nobody makes larger homogeneous fpga 2) is likely to ever ; see thread http://btcbase.org/log/2018-01-11#1769061 .
(trilema) asciilifeform: nao, there ~is~ today something that there wasn't 5y ago, which is the properly-reversed fpga :
(trilema) asciilifeform: mircea_popescu: if we had any fab capacity to speak of, these'd be the priority items : 1) large homogeneous fpga 2) otp roms 3) 1+2
(trilema) asciilifeform: ( and in more 'luxurious' fpga, some components have variable delay depending on how configed , even )
(trilema) asciilifeform: mircea_popescu: this is one of those items that really wants the rsa fpga
(trilema) asciilifeform: the lack of an fpga where i could go straight to demonstrating this experimentally, is a pretty substantial headache for asciilifeform
(trilema) asciilifeform: unfortunately i do not have any way to make asic. as for fpga, none exist of the necessary size. ( see e.g. http://btcbase.org/log/2018-01-04#1764242 )
(trilema) asciilifeform: some people spent $10k's on their collections of bolixiana. and imagine that these will become worthless if an accurate fpgalogical emulator appears. and for all i know , this is true. i simply don't care.
(trilema) asciilifeform: for an every-transistor-documented xilinx 'virtex' fpga clone ? would pay
(trilema) asciilifeform: apeloyee: afaik nobody ever sold a 'sea of gates' fpga/cpld with sram bitstream storage.
(trilema) asciilifeform: and it's the 1 fpga currently sold that's worth copying ( scaled-up, naturally )
(trilema) asciilifeform: the only cure for this is to fab own fpga.
(trilema) asciilifeform: ( granted fg itself it is not a general-purpose comp. but the fpga substrate -- is. observe that it is not programmed by being given a series of sequentially-executed instructions. )
(trilema) asciilifeform: http://btcbase.org/log/2017-12-27#1758913 << it's not the wasted 8kbit or whatnot ( though on e.g. fpga, that's real waste that you can take to the bank...) but the ~ugliness~
(trilema) asciilifeform: really the endgame of this is 'compile to fpga'
(trilema) asciilifeform: it's a bad thing if you want 'asic-resistant' or even fpga-resistant
(trilema) asciilifeform: and if you merely long for the days of 8 hour compiles -- will luvv large fpga wurk.
(trilema) asciilifeform: ftr supposed 'fpga' with built-in periphs are simply proprietary gluetraps.
(trilema) asciilifeform: i specifically exclude devices like xilinx and altera series with ~built-in~ pcie -- these are not, properly speaking, fpga
(trilema) asciilifeform: but meanwhile-er, in not-at-all-noose, asciilifeform briefly looked into the question of what-would-it-take to make a pci-e FG . found ( e.g. https://archive.is/dGtBI and elsewhere, for the curious ) that it is quite impossible to do with lattice 'ice' or any other small fpga; the complexity is bookcase-length ( supposing one could even ~get~ the req'd docs, many are not only payware but protected via disinfo-flooding )
(trilema) asciilifeform: incidentally i know of at least 1 item that i use that still not depython3ated -- the lattice ice fpga thing
(trilema) asciilifeform: so what if sha2 chinese die, if fpga-chinese immediately take their place.
(trilema) asciilifeform: moar concretely they go around propagandizing that if you build a fpga board you gotta use it, because 'mips is patented' ( in what country ? even in usa patent is 25y ) or 'risc-v is simplest' ( uh, nope ) and other idiocy.
(trilema) asciilifeform: if you have the lattice fpga demo pcb and feel like practice.
(trilema) asciilifeform: it'd be, incidentally, an ok fpga student project
(trilema) asciilifeform: http://btcbase.org/log/2017-10-19#1726680 << i'd like a republican chair to sit in too!111 switch, however, if you want GB or above -- does require making own silicon if you want it to meaningfully differ from the extant items . fpga won't cut it clockwise.
(trilema) asciilifeform: fpga has a bit muxer and none of the loops will be loops, lol
(trilema) asciilifeform: understand that in fpga 'secret shift' is NOT a function that can be 'called', but a physical object that gets instantiated, using thousands of cells, every time you use it.
(trilema) asciilifeform: and doesn't even stand a chance of fitting in fpga.
(trilema) asciilifeform: and incidentally i was not joking when said 32kb, it is fully my intention to eventually put whole thing on fpga where there will be certainly not even half MB of working space.
(trilema) asciilifeform: ( incidentally fast ffalicious rsa on ~fpga~ is trivial. )
(trilema) asciilifeform wonders whether anybody would actually buy a generic fpgatronic packet eater-shitter
(trilema) asciilifeform: there's no particular reason why a router oughta contain a few 100MB of unixlike, rather than, say, a few kB of fpga config.
(trilema) asciilifeform: http://btcbase.org/log/2017-09-20#1716403 << by definition monkey business with instruction timings is ~detectable~. but the other idea is, a proper ffa is very easy to fpgaize/siliconize.
(trilema) asciilifeform: mats: lattice is the last remaining non-usg-owned fpga house. lizard gosplan terrified that it might get sold and specs for the high density fpga, opened
(trilema) asciilifeform: if we gotta compute on fpga, to do rsa sanely -- then fpga it is. 8192-bit regs.
(trilema) asciilifeform: also POSaM (linked device design) is a little antiquated, yes '04 but fpga already existed, why require megabux pci i/o card
(trilema) asciilifeform: re the archs -- lattice ice is analogous to children's toy 'lego' where you get 9,000 identical bricks; xilinx ( and altera, and the 'adult' lattice fpga on fancy dev boards ) are analogous to... i guess the 'erector' toy, where there are a certain number of fungible pieces, but also ~a~ motor, ~a~ heavy iron base, a quantity of gears, etc.
(trilema) asciilifeform: vga bouncyball is a 'pons asinorum' of sorts, in fpgadom.
(trilema) asciilifeform: trinque: can also mean 'standard fpga, because why the everliving fuck would you do anything to an fpga except to make it larger'
(trilema) asciilifeform: re fpga ( there were various 'i'ma throw something together, with 11 different closed dramcontroller, nic, etc from xilinx lib ) , a german, and i fughet who else, all similar
(trilema) asciilifeform: i can grasp the psychology ( psychiatry..? ) of the california folx. yes, imaginary star drive or immortality nanobot pill is 'moar exciting' than real-life little board with fpga...
(trilema) asciilifeform: there aren't many smaller fpga sold than the 9572.
(trilema) asciilifeform: kanzure: what means 'shit fpga' ?
(trilema) asciilifeform: kanzure: believe or not, i keep up with the literature. tell me how to boobytrap fpga.
(trilema) asciilifeform: kanzure: it's an fpga .
(trilema) asciilifeform: kanzure: i've always wanted to discuss, with clueful folx, what specifically one ought to put in 'doping trojan' to sabotage an fpga
(trilema) asciilifeform: i don't recall him ever going from micrograph to fpga bitstream format
(trilema) asciilifeform: http://btcbase.org/log/2017-08-22#1701786 << asic miners. the original 'asics' were actual shaved fpga. the next gen -- were 'hardcopy fpga', the cheapest fab available, where you just get to define metallization layer and naught else
(trilema) asciilifeform: but lattice per se is EXACTLY like xilinx, same profit model, closed arch, license 'ip cores'. their larger flagship fpga is exactly like xilinx 'spartan', full of proprietary peripherals, and that's the one that tends to get packaged into devboards with nic etc
(trilema) asciilifeform: ice40 leaves a great deal to be desired ( it is VERY small, comparatively, and doesn't come in a no-flash version, and who knows for how long it will remain in print ) but is by far the closest thing that currently exists to the sane fpga.
(trilema) asciilifeform: !~later tell spyked http://btcbase.org/log/2017-08-21#1701446 >> on second thought, you probably could put this chore off, olimex sells a ice40-8k (largest available) with 512k of sram glued on. and this is theoretically enough to prototype . the more pressing matter is ethernet. ( afaik nobody sells an ice40 + ethernetmagnetics . and just as with ddr dram, answer is 'lattice wants you to use their larger fpgas, with THEIR toolchain'
(trilema) asciilifeform: in other, slightly related lulz, http://www.vzpp-s.ru/production/catalog.pdf << ru clones of fairly recent altera fpga !!
(trilema) asciilifeform: phf: the notion is to build a box with sufficient ram, horse, capacity to drive xterm, so that you can sit down on it and edit the fpga config per se.
(trilema) asciilifeform: you gotta minimize the delay and specify gates MANUALLY for the specific fpga
(trilema) asciilifeform: phf: i haven't tried the fpga one
(trilema) asciilifeform: ( cadr was fpgaized a while back , by b. parker )
(trilema) asciilifeform: on fpga even 32768-bit rsa is as snappy as you could want
(trilema) asciilifeform: and incidentally, open fpga trivially yields sdr.
(trilema) asciilifeform: well theoretically fpga
(trilema) asciilifeform: 'oh noez if we start doing heavy lifting with open fpga it will be immediately discontinued'
(trilema) asciilifeform: ( lattice co.'s whole niche is micropower fpga )
(trilema) asciilifeform: in other noose, asciilifeform built 'icestorm', 'arachne-pnr', with plain gcc 4.9 ( the only concession to idiocy on the test machine was python3 ) . and even MOST of 'yosys' ( the last step in the ice40 open sores fpga toolchain ) built. in fact, whole thing built, but linker barfs
(trilema) asciilifeform: in other noose, lotta frustrated fpga aficionados live in #bolix.
(trilema) asciilifeform: http://btcbase.org/log/2017-08-02#1692922 << i let this slip by somehow. afaik this is STILL unsolved in the open lit. ( 'this' being 'fpga glue for ssd replacement of st506 drive' )
(trilema) asciilifeform: ( other than by baking into fpga. which 1) introduces the 'which fpga, again' problem 2) if you have fpga, big enough for sparc, you can make up a SANE arch to go in it
(trilema) asciilifeform: correct. but the answers to these depend SEVERELY on the substrate. for instance, if your thing lives in a fpga, not filling it up doesn't make it cycle any faster. so you want to actually use the available gates, if they can be used productively
(trilema) asciilifeform: at any rate the published opensparc fpga thing actually worx
(trilema) asciilifeform: it exists in everybody's 1990s game console, stereo, vcr, etc. and now also in that fpga item.
(trilema) asciilifeform: ( dark ages proprietary pre-jtag debugger, it seems, implemented in on-board fpga )
(trilema) asciilifeform: mircea_popescu: smaller fpga, i mean
(trilema) asciilifeform: asciilifeform was silently sweating over room full of fpga in those dayz.
(trilema) asciilifeform: phf: handcrafted fpga gps? yes, saw
(trilema) asciilifeform: but to date i have not even succeeded in building clang ! despite trying a number of times, because the lattice fpga thing needs it
(trilema) asciilifeform: lol it's about 100msec on decent ( fpga ) iron!111
(trilema) asciilifeform: i dun think i have quite 5k individual fpga in the parts chest, no
(trilema) asciilifeform: ( incidentally mircea_popescu's hash rewards fpgaism like nothing ever has )
(trilema) asciilifeform: i have fpga with >1MB ~internal~ sram right here.
(trilema) asciilifeform: re whitening, it might be interesting to apply 'dragonfly fpga' to 'distinguish sha'd bitstream from nonsha'd'
(trilema) asciilifeform: ( theoretically -- a comp needs only fpga, a few nics, some memory, and a means of hooking up hdd )
(trilema) asciilifeform: ( layout for high-speed fpga is a royal bitch )
(trilema) asciilifeform: not unless author of fpga circuit chooses to arrange it pc-style (and why!)
(trilema) asciilifeform: in other noose, asciilifeform learned that a very recent chinese fpga board : AX516 ( http://esys.ir/images/img_Item/1158/Files/AX516_usermanual.pdf ) includes RTL8211EG , GB nic !! and cheapo.
(trilema) asciilifeform: doesn't get moar destructured than fpga...
(trilema) asciilifeform: now if only someone made honest fpga.
(trilema) asciilifeform: anyway sane arch was developed in '80s and called... fpga
(trilema) asciilifeform: the one possible exception might be ~massive~ fpga floor layouts
(trilema) asciilifeform: erlehmann: didja ask him what specifically it would mean to 'subvert' an fpga ahead of time (i.e. when you have no idea what will be loaded into it, and into what cells in particular ) ?
(trilema) asciilifeform: i'd still like to replace it with a civilized fpga for which you don't need a 20GB closed source shitware toolchain
(trilema) asciilifeform: it's why you'll find coax jacks on high-end fpga boards
(trilema) asciilifeform: incidentally, ~whole thing is trivially siliconizable/fpgaizable, given as it does not rely on von neumann flow control for anything
(trilema) asciilifeform: ( you can't do it on fpga. )
(trilema) asciilifeform: but basic idea -- nothing other than fpga machine conforms to 'auditable without electron microscope' and 'specificity of diddling'.
(trilema) asciilifeform: how to architect fpga box is separate conversation, and iirc mircea_popescu had a pretty good handle on it.
(trilema) asciilifeform: ditch the 'insulators'. asciilifeform asks for 1 thing and 1 thing only hardwarewise -- massive open fpga, coupled to dram slots.
(trilema) asciilifeform: fromloper: problem is, there ain't a usable fpga
(trilema) asciilifeform: lulzily enough, asciilifeform ~has the box~ -- but 0 software for it, it never leaked. box turned out to contain empty fpga.
(trilema) asciilifeform: a good chunk of the pain in this kind of work is the ~total lack of anything like the customary debugger. ( that, and the constraints of the medium - the very palpable differences between fpga and actual asic, but even in the latter there are physical delays )
(trilema) asciilifeform: take my old example, 'boobytrap an fpga.' elementarily you WILL need to somehow fit an ai in there, to create any serious problem for UNKNOWN bitstream
(trilema) asciilifeform: phf: the need to 'trust the foundry' evaporates under the 'SOLELY fpga fabric' model of computation. we had the thread.
(trilema) asciilifeform: mircea_popescu: the 'comp has no business being anything other than large fpga' and 'swamp of nic drivers that have 0 legit reason to exist' are elementarily plagiarized from us
(trilema) asciilifeform: a documented ~homogeneous~ fpga, would suffice.
(trilema) asciilifeform: if i ever make the fpgaized thing, it sure as fuck won't bother trying to drive an lcd or eat keyboard, wtf, just speak x11.
(trilema) asciilifeform: then, eventually, whole shebang with fpga.
(trilema) asciilifeform: then replace card with fpga+ivorychip (after reversed glue logic)
(trilema) asciilifeform: and, quite verily, they WILL be worth roughly their worth in gold reclamation, if fpga appears.
(trilema) asciilifeform: is possibly other reason why they did not care to help me fpgaize it.
(trilema) asciilifeform: the entire machine would handily fit in my ~smallest~ fpga board.
(trilema) asciilifeform: also phf yes i recall why you were going. but in light of the instruction set being out... my mind boggles, why to bother with ANYTHING but fpgaization pronto.
(trilema) asciilifeform: also it boggles my mind, why is phf still buying the old iron, the instruction set's been out since '09... buy fpga board.
(trilema) asciilifeform: and tells something about why to this day we don't have an fpga bolix.
(trilema) asciilifeform: ( my fpga boards, the nicer ones, DO in fact !! )
(trilema) asciilifeform: though i wonder if optical microscope will be worth a damn in this case : iirc smbx cpu was 'gate array', an early form of fpga based on mask rom
(trilema) asciilifeform: fpga farm also.
(trilema) asciilifeform: Old Hax behave like fpga docs etc.
(trilema) asciilifeform: interestingly the thing mentions 'open toolchain fpga' dozens of times but NOT ONCE says WHICH
(trilema) asciilifeform: so anybody claiming to 'make OPEN!11!!!! workstation!' who is not planning to make 1M+gate fpga by the megatonne, is a) subverted b) stupid or c) both.
(trilema) asciilifeform: at the risk of creating 'wall of text', i'ma spell out for the l0gz readerz: if you sell properly open cpu, folx then have a cpu. if you sell properly open fpga, they then have cpu, ram controller, video card, nic, etc, etc.
(trilema) asciilifeform: ftr the notion of making anything other than a large-as-possible fpga, for 'owner-controlled computing', is purest poppycock.
(trilema) asciilifeform: 'The world's first ATX-compatible, workstation-class mainboard for the new, free-software friendly IBM POWER8 processor. Includes one heatsink and 92 mm fan, one ATX-compatible I/O shield, and a live rescue DVD with factory reset utilities, source code for firmware and FPGA components, mainboard schematics, user manual, and Ubuntu installation media. CPU, RAM, power supply, storage drives, and chassis sold separately.'
(trilema) asciilifeform: i cannot speak for the folx mentioned above, but for me the appeal of, e.g., 6502, or of (pure 'sea of gates', a la FUCKGOATS) fpga work, is that there is 0 shit-in-the-dough
(trilema) asciilifeform: when you read it as 'slow fpga' it seems imho less appealing.
(trilema) asciilifeform: ben_vulpes: moore's greenarray is really closer to fpga (but with hypertrophied LUTs!) than to a cpu
(trilema) asciilifeform: http://btcbase.org/log/2017-01-06#1597384 << i used a similar device to connect fpga card to thinkpad, coupla years ago
(trilema) asciilifeform has an ancient one with buncha fpga crud
(trilema) asciilifeform: btw the 'array of fpgas' thing is getting made, as soon as i'm satisfied that lattice 'ice' is ~actually~ reversed. and not simply 'kicad'-ed.
(trilema) asciilifeform: meanwhile, so i get a crate with the infamous 'lattice ice' fpga. and go and set up the OPEN SORES!!!11111!!!! toolchain. and lo and behold, it not only bristles with CODE OF CUNTDOCT!!111 etc., but... won't even build
(trilema) asciilifeform: (your fpga or whatever.)
(trilema) asciilifeform: (pixel is connected directly to pipe, that can go wherever, fpga-style.)
(trilema) asciilifeform: similarly to how 'asic' vendors will happily ship 2014 fpga with the etching sanded off.
(trilema) asciilifeform: mepian: what i want to make is a ZERO-closed-vendor-turd machine, among other things. and no existing fpga gives you this.
(trilema) asciilifeform: and on at least six other occasions. somebody regularly shows up and asks re fpga.
(trilema) asciilifeform: (if you can source the parts, they are all end-of-life, including the weird fpga)
(trilema) asciilifeform: all roads lead to sane fpga, or to perdition.
(trilema) asciilifeform: the other bit is, just as in the fpga thread, by the time anyone ~does~ spend the man-years, the requisite hardware is unavailable. see, e.g., 'movitz'.
(trilema) asciilifeform: mircea_popescu: this is gonna be the fpga thread all over again, isnnit. fact is, the 10,001 man-years are not available, and certainly not six times every morning before breakfast.
(trilema) asciilifeform: (per my estimate of the transistor count, i'd say that a 100% cycle-for-cycle clone could handily sit down in a $100 fpga and leave plenty of room for, e.g., modern colour vga, etc.)
(trilema) asciilifeform: http://www.clifford.at/icestorm << yet another fpga reversing effort.
(trilema) asciilifeform: mircea_popescu: to briefly revisit thread, one interesting tidbit you might not know about 'hardcopy fpga' is that it stands on same toolchain as the respective vendor's 'ordinary' fpga (on which one prototypes for the 'hard' variant.)
(trilema) asciilifeform: recall, i ~like~ fpga, and if it were my will, it would be the only logic chip produced, and anyone who 'needs' ddr3 clock can get phucked
(trilema) asciilifeform: the real 'killer app' of fpga is 'specificity of diddling'
(trilema) asciilifeform: fpga is quite like the semiconductor equiv. of '3d printer'.
(trilema) asciilifeform: other point was that it is quite rare to see fpga deployed in mass produced product, because it has inescapably large per-unit cost compared to classical asic. it makes economic sense for small runs (<100,000) and for items which actually need the reconfigurability.
(trilema) asciilifeform: anyway metal fpga is great, i'll take ten right now if it's a dime.
(trilema) asciilifeform: re fpga, largest buyer (not a mega-seekrit) is usg.
(trilema) asciilifeform: or even so much as bought 1 unit of fpga, and designed whatever, helloworld.
(trilema) asciilifeform: chinese have 0 incentive to sell fpga.
(trilema) asciilifeform: ever see manual for, e.g., xilinx fpga? it is simply a mass of these turds.
(trilema) asciilifeform: because it is in fact fpga.
(trilema) asciilifeform: thing is, you get the clock rate of fpga. and same energy consumption. (~same propagation delays).
(trilema) asciilifeform: $s hardcopy fpga
(trilema) asciilifeform: trinque: i wrote an fpga thing, long ago.
(trilema) asciilifeform: this is one of the reasons i wrote 'must have fpga, with quartz window'. you can inspect a ~regular~ geometric structure far more easily than any other kind
(trilema) asciilifeform: there IS NOT AN FPGA
(trilema) asciilifeform: pete_dushenski: the usg that promulgates diddled ciphers which are then breakable with array of fpga, and the usg that puts my mail into the box across the street, are not same entity.
(trilema) asciilifeform: pete_dushenski: recall that usg sits on top of egyptian pyramid - sized heap of fpga. why not, then, hijack an old, familiar scrypt-based altcoin, and proclaim 'see, YES WE CAN!111' etc
(trilema) asciilifeform suspects that 99% of it is used with fpga
(trilema) asciilifeform: mircea_popescu: very easy to change if they bought up all the old fpga farms.
(trilema) asciilifeform: hey hey ho ho THAT's where the fpga farms went.
(trilema) asciilifeform: prolly running on fpga.
(trilema) ascii_deadfiber: it lives on fpga
(trilema) asciilifeform: (see logz, we had at least half a dozen 'if fpga actually existed' threads.)
(trilema) asciilifeform: this is why the only tmsr silicon worth making is an fpga.
(trilema) asciilifeform: and everybody pretty much uses fpga clusters for actual cryptoanalysis anyway. so elaborate 'let's zap the miners' trickery is ~pointless.
(trilema) asciilifeform: and they are what is needed to replicate the thing on fpga.
(trilema) asciilifeform: phf: fpga. is the only reasonable definition.
(trilema) asciilifeform: (modern vendors succumb to the temptation to put a great many special-purpose parts in fpga, e.g., multipliers, even whole cpu cores, etc. i am specifically not talking about their rubbish.)
(trilema) asciilifeform: fpga is also nice because, in principle, it can be optically inspected
(trilema) asciilifeform: also 'greenarray' i will nitpick is not an fpga
(trilema) asciilifeform: analogously, the correct thing to make today would be not merely fpga,
(trilema) asciilifeform: but then the act is only scarcely different from using fpga.
(trilema) asciilifeform: fpga also plays well with my 'specificity of diddling' theorem.
(trilema) asciilifeform: (fpga only became a seriously practical thing, really, in 2000s. you will find them from '90s but on MASSIVE boards with dozens of the same unit)
(trilema) asciilifeform: if i could make one thing, on a traditional si process, it would be an fpga.
(trilema) asciilifeform: i actually spent the first ~6 mo. after i bought the lisp machine, trying to rig up, with fpga, a mechanism to read the fucking disk
(trilema) asciilifeform: this is why the sane fpga will have to be produced.
(trilema) asciilifeform: sbp ^ there ARE NO FPGA
(trilema) asciilifeform: sbp: where do you intend to get a usable fpga ?
(trilema) asciilifeform: mircea_popescu: they are related strictly in the sense where we are likely to get 1980s fabbing capability long before 'modern', but also in the sense where we might have to use fpga or even discrete logic elements before this is all through
(trilema) asciilifeform: that is, if i want to run it on an arch that gets auto-genned on my fpga every morning, i oughta be able to.
(trilema) asciilifeform: if i had even so much as mined on the ~fpgas that i already owned~ when the thing began, i would be in neighbouring dirigible to mircea_popescu
(trilema) asciilifeform: mod6: you could fit 500 of them on a cheap fpga. but you will be using an AMERICAN FPGA
(trilema) asciilifeform: (inside is also a xilinx fpga and some sram.)
(trilema) asciilifeform: 'NSA@home is a fast FPGA-based SHA-1 and MD5 bruteforce cracker. It is capable of searching the full 8-character keyspace (from a 64-character set) in about a day in the current configuration for 800 hashes concurrently, using about 240W of power. This performance is equivalent to over 1500 Athlon FX-60 CPUs, which would take about 250kW.'
(trilema) asciilifeform: (usg recently jailed some schmuck for 'exporting secret' of fpga.)
(trilema) asciilifeform: i find the TOTAL absence of documented fpga on the planet , to be interesting.
(trilema) asciilifeform: and the item would, in all likelihood, have to be an fpga. (that can be sold to heathens)
(trilema) asciilifeform: (the ultimate thermonuclear version of this is to ~randomly generate~ a cpu arch, instantiate on an fpga ~and generate a compiler~, and compile for THAT! and i was very sad as a student to discover that one cristina cifuentes invented this long before i did)
(trilema) asciilifeform: take an official lcd tv, attach fpga where the panel ribbon cable was.
(trilema) asciilifeform: http://log.bitcoin-assets.com/?date=18-02-2016#1409548 << laugh, but as a schoolboy i wanted to build exactly this. even wrote lengthy treatise turd concerning it. even bought fpga (and then realized that i have no way to attach it to a board, 0.5mm pitch)
(trilema) asciilifeform: a few hectares of this, and you have (slow...) fpga...
(trilema) ascii_butugychag: but i would readily pay 10k for a box with ONLY open fpga
(trilema) ascii_butugychag: this being said, if the thing consisted 100% of ~documented~ fpga fabric, i would buy it
(trilema) asciilifeform: http://log.bitcoin-assets.com/?date=06-02-2016#1397691 << fpga fabric. as i described maybe 1,001 times.
(trilema) asciilifeform: ^ 'open toolchain fpga' will happen some time after pigs fly over a frozen hell.
(trilema) asciilifeform: 'open-toolchain FPGAs'
(trilema) ascii_butugychag: ' utilizes open-toolchain FPGAs' << this, i'd like to see
(trilema) ascii_butugychag: quite! nobody will be plagiarizing old verilog from fpga docs to bake this one.
(trilema) asciilifeform even bought first fpga as a schoolboy without understanding that it will have to be mounted somewhere. still have it.
(trilema) asciilifeform: mircea_popescu: he's after the legendary 'dragonfly' fpga.
(trilema) asciilifeform: gabriel_laddel: fpga is pretty much never mounted in a socket (the low end xilinx cpld, e.g., 95xx series, do come in plcc - but high pin count makes this a bitch)
(trilema) ascii_shmoocon: the other thing is that alt with novel pov is a giftwrapped offering to the fella with the largest stash of ready fpga fabric. which is...
(trilema) asciilifeform: incidentally, why was there never (afaik) an attempt at a laser-programmed fpga ?
(trilema) asciilifeform: today reversing a xilinx chip is largely a waste of time, a good chunk of the functionality is in quite un-fpgaish special-purpose chunks which get reshuffled with each new model
(trilema) asciilifeform: http://log.bitcoin-assets.com/?date=01-12-2015#1334537 << famous among aficionados. 'neocad' actually reversed the time's xilinx fpga line. 'had to die.'
(trilema) asciilifeform: 'only a terrorist would demand the full docs for the fpga or a full netlist for the arm!'
(trilema) ascii_field: let them magicpacket my fpga.
(trilema) ascii_field: and this is often gnarly and expensive to reverse, because it's on fpga, yes, and might need 500 units to destroy
(trilema) ascii_field: generally, folks who are obsessed with 'someone may steal my magic algo!!111!!!!' ship the whole shebang on fpga with config in sram, backed with watch battery;
(trilema) asciilifeform: !s hardcopy fpga
(trilema) asciilifeform: but if anyone presently alive could fab a muller gate fpga, it is probably moore.
(trilema) asciilifeform: (not even speaking of fpga variant here)
(trilema) asciilifeform: http://log.bitcoin-assets.com/?date=28-07-2015#1214498 << picture the sheer amount of cpu (gpu? fpga? asic?!!) cycles that went into creating that
(trilema) asciilifeform: ... except for my biggest fpga board
(trilema) asciilifeform: partly this is on account of using 'hardcopy fpga'
(trilema) ascii_field: a 'doxxed' fpga is entirely useless if you can't get it!
(trilema) asciilifeform: mats: i remember that one - pretty neat! http://www.excamera.com/sphinx/fpga-j1.html << original www of it
(trilema) asciilifeform: trinque: i'd even argue that fpga is a mis-step historically, and you'd want to start with traditional 'gal' (as pictured here, http://design.iconnect007.media/index.php/article/31256/maxed-out-programmable-logic-part-deux/31259/?skin=design )
(trilema) asciilifeform: trinque: http://www.fpga4fun.com/FPGAinfo2.html << intro to state of art re: programmable logic
(trilema) asciilifeform: these presently exist, you can go to store and buy. called fpga.
(trilema) ascii_field: as if fpga has ~ever~ (at least since '92 or so) been 'exposed' as anything but the blackest of black boxes
(trilema) ascii_field: 'When JTRS started, software-defined radio (SDR) was still in its infancy. The project's SCA architecture allowed software to manipulate field-programmable gate arrays (FPGAs) in the radio hardware to reconfigure how its electronics functioned, exposing those FPGAs as CORBA objects. But when development began, hardware implementations of CORBA for FPGAs didn’t really exist in any standard form.' << giga-l0l!
(trilema) ascii_field: kakobrekla: 'hard copy fpga' has fixed metal, rather than sram LUTs for routing matrix. so slightly faster (and significantly cheaper to manufacture) than ordinary fpga
(trilema) ascii_field: (they are fpga with hardcoded metallization layer)
(trilema) ascii_field: considering that to me, the ~whole fucking point~ of fpga is to get a computer which ~i and only i~ define
(trilema) ascii_field: (xilinx, altera, actel, etc. ~all~ make the bulk of their revenue by charging rent for 'properties' like 'the right to have a network card' in your fpga)
(trilema) ascii_field: i will remind readers that reversing fpga is not impossible, and has been done. but takes ~20 years and chip is usually unobtainable after 5-10 (sooner if vendor learns that you're doing this)
(trilema) ascii_field: http://log.bitcoin-assets.com/?date=17-06-2015#1166281 << everything is 'measurable.' but you have to be ~able to lay out the circuit physically~ rather than merely mathematically to get the guaranteed equal delays. as in, you have to have knowledge of ~all~ addressable part of the fpga.
(trilema) asciilifeform: a readily-available ~true~ fpga would be the greatest political advance in a century of electronic crud.
(trilema) asciilifeform: thing is, fpga is fundamentally a very cruel lie
(trilema) asciilifeform: you can pick up a textbook and write a dram controller for fpga from first principles - and it won't work. because, for starters, only a small number of output cells in the chip can function on both rising and falling edge of clock cycle (what 'ddr' means) and only xilinx's closed turd knows where they are in the routing fabric;
(trilema) asciilifeform: it is trickier than first appears, because 'i want the s00p3r-s33kr1t floor plan for $fpga' is turing-complete (that is, whether the trade was an honest one is not resolvable by machine)
(trilema) ascii_field: see also the fpga threads.
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